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Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology

The Digital Pixel Test Structure (DPTS) is a monolithic active pixel sensor prototype chip designed to explore the TPSCo 65 nm ISC process in the framework of the CERN-EP R&D; on monolithic sensors and the ALICE ITS3 upgrade. It features a 32 × 32 binary pixel matrix at 15 μm pitch with event-dr...

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Detalles Bibliográficos
Autores principales: Cecconi, L, Piro, F, de Melo, J L A, Deng, W, Hong, G H, Snoeys, W, Mager, M, Suljic, M, Kugathasan, T, Buckland, M, Aglieri Rinella, G, Leitao, P V, Reidt, F, Baudot, J, Bugiel, S, Colledani, C, Contin, G, Hu, C, Kluge, A, Kluit, R, Vitkovskiy, A, Russo, R, Becht, P, Grelli, A, Hasenbichler, J, Munker, M, Soltveit, H K, Menzel, M W, Sonneveld, J, Tiltmann, N
Lenguaje:eng
Publicado: 2023
Materias:
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/18/02/C02025
http://cds.cern.ch/record/2861835

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