HKROC: an integrated front-end ASIC to readout photomultiplier tubes for the Hyper-Kamiokande experiment

The HKROC ASIC was originally designed to readout the photomultiplier tubes (PMTs) for the Hyper-Kamiokande (HK) experiment. HKROC is a very innovative ASIC capable of readout a large number of channels satisfying stringent requirements in terms of noise, speed and dynamic range. Each HKROC channel...

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Detalles Bibliográficos
Autores principales: Conforti Di Lorenzo, S, Afiri, A, Bolognesi, S, Bombardi, G, Bouyjou, F, Callier, S, De La Taille, C, Dinaucourt, P, Drapier, O, Dulucq, F, El Berni, A, Extier, S, Firlej, M, Fiutowski, T A, Gastaldi, F, Guilloux, F, Idzik, M, Marchioro, A, Mghazli, A, Molenda, A, Moron, J, Nanni, J, Quilain, B, Raux, L, Swientek, K P, Thienpont, D, Vergine, T
Lenguaje:eng
Publicado: 2023
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/18/01/C01035
http://cds.cern.ch/record/2861854
Descripción
Sumario:The HKROC ASIC was originally designed to readout the photomultiplier tubes (PMTs) for the Hyper-Kamiokande (HK) experiment. HKROC is a very innovative ASIC capable of readout a large number of channels satisfying stringent requirements in terms of noise, speed and dynamic range. Each HKROC channel features a low-noise preamplifier and shapers, a 10-bit successive approximation Analog-to-Digital Converter (SAR-ADC) (designed by AGH Krakow) for the charge measurement (up to 2500 pC) and a Time-to-Digital Converter (TDC) (designed by CEA IRFU group) for the Time-of-Arrival (ToA) measurement with 25 ps binning. HKROC is auto-triggered and includes all necessary ancillary services as bandgap circuit, PLL (Phase-locked loop) and threshold DACs (Digital to Analog Converters). This paper will describe the ASIC architecture and the experimental results of the first HKROC prototype received in January 2022.

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