Cargando…
DART28-FPGA implementation study for future high-speed links
The data link from the detectors to the back-end stage must keep up with the requirements from the upcoming generation of High Energy Physics experiments. Last year, we presented at TWEPP the investigation on the feasibility and limitation of high data-rate links based on the 4-Level Pulse-Amplitude...
Autores principales: | Wanotayaroj, C, Mendes, E, Baron, S, Kulis, S |
---|---|
Lenguaje: | eng |
Publicado: |
2023
|
Materias: | |
Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/18/01/C01024 http://cds.cern.ch/record/2861855 |
Ejemplares similares
-
PAM-4 implementation study for future high-speed links
por: Wanotayaroj, C, et al.
Publicado: (2022) -
New LpGBT-FPGA IP: Simulation model and first implementation
por: Mendez, Julian Maxime, et al.
Publicado: (2019) -
Development of FPGA-based High Speed Serial Links for High Energy Physics Experiments
por: Perrella, Sabrina
Publicado: (2018) -
Radiation hard true single-phase-clock logic for high-speed circuits in 28 nm CMOS
por: Klekotko, A, et al.
Publicado: (2023) -
Implementation of an FPGA based calibration procedure at the detector level for the future high-luminosity phase of the CMS
por: Hugo, Dewitte
Publicado: (2017)