Design and verification of a high-speed digitizer system for beam loss detection at CERN

With the aim of improving the functionalities of the current data acquisition system, the Beam Loss section of CERN decided to implement a novel system based on FPGA. This development offers greater flexibility in the firmware and facilitates internal data processing in the device, in addition to providing the capacity to store these data. This innovation enhances the existing capabilities and gives CERN full control over the system. The present thesis will focus on the development and validation of the aforementioned system, aiming to meet the technical requirements issued by CERN’s control center. Throughout this document, we will detail the various developed modules and explain their respective functions and responsibilities. Furthermore, we will delve into the functional verification of the system and describe the tools used for its validation. Finally, we will present the results obtained after applying different input signals and perform their corresponding analysis.