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FPGA-Accelerated Neural Network Inference for Ultra-Low-Latency Recalibration and Classification of Physics Objects at 40 MHz within CMS

<!--HTML-->In the realm of data processing and physics analysis at the Large Hadron Collider (LHC), there exists a notable advantage of deep learning-based algorithms over traditional physics-based counterparts. This study explores cutting-edge methodologies for the low latency neural network...

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Detalles Bibliográficos
Autor principal: Choudhury, Diptarko
Lenguaje:eng
Publicado: 2023
Materias:
Acceso en línea:http://cds.cern.ch/record/2868471
Descripción
Sumario:<!--HTML-->In the realm of data processing and physics analysis at the Large Hadron Collider (LHC), there exists a notable advantage of deep learning-based algorithms over traditional physics-based counterparts. This study explores cutting-edge methodologies for the low latency neural network inference on Field Programmable Gate Array (FPGA) devices. Specifically, we concentrate on the recalibration and classification of physics objects at a demanding rate of 40 MHz within the CMS framework. The primary objective of this work is to develop an ultra-low-latency neural network model, strategically combining various techniques such as Quantization Aware Training, Knowledge Distillation, transfer learning, and Pruning schedules to achieve an exceptionally low latency without compromising the integral reconstruction performance.