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An FPGA-based Front-end Module Emulator for the High Granularity Timing Detector
This paper introduces an FPGA-based front-end module emulator developed for the High Granularity Timing Detector (HGTD) within the ATLAS experiment. The emulator serves as a stand-in for the HGTD readout module during the stage when the readout module is unavailable. Utilizing a Xilinx-Spartan 7 FPG...
Autores principales: | , , , |
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Lenguaje: | eng |
Publicado: |
2023
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/2876739 |