Applications of the scalable coherent interface to data acquisition at LHC

We propose to use the Scalable Coherent Interface (SCI) as a very high speed interconnect between LHC detector data buffers and farms of commercial trigger processors. Both the global second and third level trigger can be based on SCI as a reconfigurable and scalable system. SCI is a proposed IEEE standard which uses fast point-to-point links to provide computer-bus like services. It can connect a maximum of 65 536 nodes (memories or processors), providing data transfer rates of up to 1 Gbyte/s. Scalable data acquisition systems can be built using either simple SCI rings or complex switches. The interconnections may be flat cables, coaxial cables, or optical fibres. SCI protocols have been entirely implemented in VLSI, resulting in a significant simplification of data acquisition software. Novel SCI features allow efficient implementation of both data and processor driven readout architectures. In particular, a very efficient implementation of the third level trigger can be achieved by combining SCI's shared and distributed memory with the virtual memory of modern RISC processors. This approach avoids complex event building hardware and software. Collaboration with computer and VLSI manufacturers is foreseen to assure the production of maintainable components. The proposed studies on SCI hardware and software will be made in collaboration with other LHC R&D projects to provide a basis for future, standard SCI-based data acquisition systems.