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The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system

The CERN SPS and LEP PowerPC project is aimed at introducing a new generation of PowerPC VMEbus processor modules running the LynxOS real-time operating system. This new generation of front end computers using the state-of-the-art microprocessor technology will first replace the obsolete XENIX PC ba...

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Detalles Bibliográficos
Autores principales: Charrue, P, Bland, A, Ghinet, F, Ribeiro, P
Lenguaje:eng
Publicado: 1995
Materias:
Acceso en línea:http://cds.cern.ch/record/292567
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author Charrue, P
Bland, A
Ghinet, F
Ribeiro, P
author_facet Charrue, P
Bland, A
Ghinet, F
Ribeiro, P
author_sort Charrue, P
collection CERN
description The CERN SPS and LEP PowerPC project is aimed at introducing a new generation of PowerPC VMEbus processor modules running the LynxOS real-time operating system. This new generation of front end computers using the state-of-the-art microprocessor technology will first replace the obsolete XENIX PC based systems (about 140 installations) successfully used since 1988 to control the LEP accelerator. The major issues addressed in the scope of this large scale project are the technical specification for the new PowerPC technology, the re-engineering aspects, the interfaces with other CERN wide projects, and the set up of a development environment. This project offers also support for other major SPS and LEP projects interested in the PowerPC microprocessor technology.
id cern-292567
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1995
record_format invenio
spelling cern-2925672023-05-05T12:57:21Zhttp://cds.cern.ch/record/292567engCharrue, PBland, AGhinet, FRibeiro, PThe new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators systemAccelerators and Storage RingsThe CERN SPS and LEP PowerPC project is aimed at introducing a new generation of PowerPC VMEbus processor modules running the LynxOS real-time operating system. This new generation of front end computers using the state-of-the-art microprocessor technology will first replace the obsolete XENIX PC based systems (about 140 installations) successfully used since 1988 to control the LEP accelerator. The major issues addressed in the scope of this large scale project are the technical specification for the new PowerPC technology, the re-engineering aspects, the interfaces with other CERN wide projects, and the set up of a development environment. This project offers also support for other major SPS and LEP projects interested in the PowerPC microprocessor technology.CERN-SL-95-115-COoai:cds.cern.ch:2925671995-11-29
spellingShingle Accelerators and Storage Rings
Charrue, P
Bland, A
Ghinet, F
Ribeiro, P
The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system
title The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system
title_full The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system
title_fullStr The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system
title_full_unstemmed The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system
title_short The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system
title_sort new generation of powerpc vmebus front end computers for the cern sps and lep accelerators system
topic Accelerators and Storage Rings
url http://cds.cern.ch/record/292567
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