A demonstrator analog signal processing circuit in a radiation hard SOI-CMOS technology

It is proposed to develop a demonstrator integrated circuit for particle detector analog signal processing using the advanced 1.2 micron HSOI3-HD Silicon-on-Insulator (SOI) CMOS radiation hard technology of Thomson-TMS, which has recently become accessible for selected civilian applications. The characteristics announced for this process promise survivability after a total dose in excess of 10 Mrad (SiO2) and 10**14 to 10**15 n/cm2, which is probably satisfactory for applications in LHC detector systems. The properties of such a SOI process look promising, in particular regarding speed. In view of the special analog requirements in the particle physics environment,one should verify the analog characteristics before and after irradiation by producing a demonstrator signal processing circuit which incorporates the most vital functional blocks. This demonstrator would consist of a low noise front-end amplifier, a comparator and an analog pipeline element with associated logic, following the scheme of the Hierarchical Analog Readout Pipelined Processor HARP, which has been developed in the framework of the CERN-LAA detector R&D project.