Triggering and event building results using the C104 packet routing chip

The C104 is an asynchronous 32-way dynamic packet routing chip. It has a 264Mbytes/s bi-directional bandwidth and a 1 µsec switching latency. It offers high-density cost- effective commodity communications, which allow large switching networks to be con- structed. Results are presented on the perfor...

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Detalles Bibliográficos
Autores principales: Dobinson, Robert W, Francis, D, Heeley, R, Moonen, J R
Lenguaje:eng
Publicado: 1995
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1016/0168-9002(96)00195-7
http://cds.cern.ch/record/294577
Descripción
Sumario:The C104 is an asynchronous 32-way dynamic packet routing chip. It has a 264Mbytes/s bi-directional bandwidth and a 1 µsec switching latency. It offers high-density cost- effective commodity communications, which allow large switching networks to be con- structed. Results are presented on the performance of this switching technology within the context of future High Energy Physics level II and level III trigger data traffic patterns.

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