A low power, large dynamic range, CMOS amplifier and analog memory for capacitive sensors

This paper has been written to announce the design of a CMOS charge to voltage amplifier and it¹s integration within an analog memory. Together they provide the necessary front end electronics for the CMS electromagnetic calorimeter (ECAL) preshower detector systeAspell,Pm in the LHC experiment foreseen at the CERN particle physics laboratory. The design and measurements of the amplifier realised in a 1.5mm bulk CMOS process as a 16 channel prototype chip are presented. Results show the mean gain and peaking time of <peak_voltage> = 1.74mV/mip, <peak_time> = 18ns with channel to channel variations; s(peak_voltage) = 8% and s(peak_time) = 6.5%. The dynamic range is shown to be linear over 400mips with an integral non linearity (INL)=0.05mV as expressed in terms of sigma from the mean gain over the 400mip range. The measured noise of the amplifier was ENC=1800+41e/pF with a power consumption of 2.4mW/channel. The amplifier can support extreme levels of leakage current. The gain remains constant for up to 200mA of leakage current. The integration of this amplifier within a 32 channel, 128 cell analog memory chip ³DYNLDR² is then demonstrated. The DYNLDR offers sampling at 40MHz with a storage time of up to 3.2ms. It provides continuous Write/Read access with no dead time. Triggered data is protected within the memory until requested for readout which is performed at 2.5MHz. The memory is designed to have a steerable dc level enabling maximum dynamic range performance. Measurements of the DYNLDR are presented confirming the original amplifier performance. The memory itself has a very low pedestal non uniformity (s(ped)) of 0.9mV and a gain of 10mV/mip.