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Re-Engineering of the CERN Accelerators and Services Control System based on VMEbus and PowerPC Technology

A new generation of PowerPC VMEbus front-end computers is being introduced in the CERN accelerators and services control system infrastructure. This new technology is aimed at replacing existing PC based front-end computers and at offering a high performance microprocessor platform for present and f...

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Detalles Bibliográficos
Autores principales: Bland, A, Charrue, P, Ghinet, F, Ribeiro, P, Rausch, R, Van den Eynden, M
Lenguaje:eng
Publicado: 1996
Materias:
Acceso en línea:http://cds.cern.ch/record/309238
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author Bland, A
Charrue, P
Ghinet, F
Ribeiro, P
Rausch, R
Van den Eynden, M
author_facet Bland, A
Charrue, P
Ghinet, F
Ribeiro, P
Rausch, R
Van den Eynden, M
author_sort Bland, A
collection CERN
description A new generation of PowerPC VMEbus front-end computers is being introduced in the CERN accelerators and services control system infrastructure. This new technology is aimed at replacing existing PC based front-end computers and at offering a high performance microprocessor platform for present and future engineering developments for the LHC era. This paper describes the re-engineering strategy and the core architecture of the new systems. Special performance issues are also addressed in this paper.
id cern-309238
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1996
record_format invenio
spelling cern-3092382023-05-05T12:57:27Zhttp://cds.cern.ch/record/309238engBland, ACharrue, PGhinet, FRibeiro, PRausch, RVan den Eynden, MRe-Engineering of the CERN Accelerators and Services Control System based on VMEbus and PowerPC TechnologyAccelerators and Storage RingsA new generation of PowerPC VMEbus front-end computers is being introduced in the CERN accelerators and services control system infrastructure. This new technology is aimed at replacing existing PC based front-end computers and at offering a high performance microprocessor platform for present and future engineering developments for the LHC era. This paper describes the re-engineering strategy and the core architecture of the new systems. Special performance issues are also addressed in this paper.CERN-SL-96-053oai:cds.cern.ch:3092381996-08-14
spellingShingle Accelerators and Storage Rings
Bland, A
Charrue, P
Ghinet, F
Ribeiro, P
Rausch, R
Van den Eynden, M
Re-Engineering of the CERN Accelerators and Services Control System based on VMEbus and PowerPC Technology
title Re-Engineering of the CERN Accelerators and Services Control System based on VMEbus and PowerPC Technology
title_full Re-Engineering of the CERN Accelerators and Services Control System based on VMEbus and PowerPC Technology
title_fullStr Re-Engineering of the CERN Accelerators and Services Control System based on VMEbus and PowerPC Technology
title_full_unstemmed Re-Engineering of the CERN Accelerators and Services Control System based on VMEbus and PowerPC Technology
title_short Re-Engineering of the CERN Accelerators and Services Control System based on VMEbus and PowerPC Technology
title_sort re-engineering of the cern accelerators and services control system based on vmebus and powerpc technology
topic Accelerators and Storage Rings
url http://cds.cern.ch/record/309238
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AT charruep reengineeringofthecernacceleratorsandservicescontrolsystembasedonvmebusandpowerpctechnology
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AT ribeirop reengineeringofthecernacceleratorsandservicescontrolsystembasedonvmebusandpowerpctechnology
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