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High Performance Computing Nodes for Real Time Parallel Applications
A high performance computing node combining the computational performance of the Digital Alpha 21066A microprocessor and the communications capability of the SGS Thomson T9000 Transputer has been developed and evaluated. The event reconstruction program used in the CPLEAR experiment at CERN has been...
| Autores principales: | , , , |
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| Lenguaje: | eng |
| Publicado: |
1996
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1016/S0168-9002(97)00663-3 http://cds.cern.ch/record/319823 |
| Sumario: | A high performance computing node combining the computational performance of the Digital Alpha 21066A microprocessor and the communications capability of the SGS Thomson T9000 Transputer has been developed and evaluated. The event reconstruction program used in the CPLEAR experiment at CERN has been successfully run on a small network containing these nodes and the hardware and software demonstrated to be reliable. |
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