Totem: a case study in HEP

It is being proved that the neurochip \Totem{} is a viable solution for high quality and real time computational tasks in HEP, including event classification, triggering and signal processing. The architecture of the chip is based on a "derivative free" algorithm called Reactive Tabu Searc...

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Detalles Bibliográficos
Autores principales: Dusini, S, Ferrari, F, Lazzizzera, I, Lee, P, Sartori, A, Sidoti, A, Tecchiolli, G P, Zorat, A
Lenguaje:eng
Publicado: 1997
Materias:
Detectors and Experimental Techniques
Acceso en línea:http://cds.cern.ch/record/325902
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author Dusini, S
Ferrari, F
Lazzizzera, I
Lee, P
Sartori, A
Sidoti, A
Tecchiolli, G P
Zorat, A
author_facet Dusini, S
Ferrari, F
Lazzizzera, I
Lee, P
Sartori, A
Sidoti, A
Tecchiolli, G P
Zorat, A
author_sort Dusini, S
collection CERN
description It is being proved that the neurochip \Totem{} is a viable solution for high quality and real time computational tasks in HEP, including event classification, triggering and signal processing. The architecture of the chip is based on a "derivative free" algorithm called Reactive Tabu Search (RTS), highly performing even for low precision weights. ISA, VME or PCI boards integrate the chip as a coprocessor in a host computer. This paper presents: 1) the state of the art and the next evolution of the design of \Totem{}; 2) its ability in the Higgs search at LHC as an example.
id cern-325902
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1997
record_format invenio
spelling cern-3259022019-09-30T06:29:59Zhttp://cds.cern.ch/record/325902engDusini, SFerrari, FLazzizzera, ILee, PSartori, ASidoti, ATecchiolli, G PZorat, ATotem: a case study in HEPDetectors and Experimental TechniquesIt is being proved that the neurochip \Totem{} is a viable solution for high quality and real time computational tasks in HEP, including event classification, triggering and signal processing. The architecture of the chip is based on a "derivative free" algorithm called Reactive Tabu Search (RTS), highly performing even for low precision weights. ISA, VME or PCI boards integrate the chip as a coprocessor in a host computer. This paper presents: 1) the state of the art and the next evolution of the design of \Totem{}; 2) its ability in the Higgs search at LHC as an example.hep-ex/9705008oai:cds.cern.ch:3259021997-05-14
spellingShingle Detectors and Experimental Techniques
Dusini, S
Ferrari, F
Lazzizzera, I
Lee, P
Sartori, A
Sidoti, A
Tecchiolli, G P
Zorat, A
Totem: a case study in HEP
title Totem: a case study in HEP
title_full Totem: a case study in HEP
title_fullStr Totem: a case study in HEP
title_full_unstemmed Totem: a case study in HEP
title_short Totem: a case study in HEP
title_sort totem: a case study in hep
topic Detectors and Experimental Techniques
url http://cds.cern.ch/record/325902
work_keys_str_mv AT dusinis totemacasestudyinhep
AT ferrarif totemacasestudyinhep
AT lazzizzerai totemacasestudyinhep
AT leep totemacasestudyinhep
AT sartoria totemacasestudyinhep
AT sidotia totemacasestudyinhep
AT tecchiolligp totemacasestudyinhep
AT zorata totemacasestudyinhep

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