Cargando…
A high-resolution time-to-digital converter based on an array of delay locked loops
Autores principales: | Mota, M, Christiansen, J |
---|---|
Lenguaje: | eng |
Publicado: |
1997
|
Materias: | |
Acceso en línea: | http://cds.cern.ch/record/349900 |
Ejemplares similares
-
A high-resolution time interpolator based on a delay locked loop and an RC delay line
por: Mota, M, et al.
Publicado: (1999) -
A CMOS delay locked loop and sub-nanosecond time-to-digital converter chip
por: Santos, D M, et al.
Publicado: (1995) -
A four channel, self-calibrating, high resolution, time to digital converter
por: Mota, M, et al.
Publicado: (1998) -
A flexible multi-channel high-resolution time-to-digital converter ASIC
por: Mota, M, et al.
Publicado: (2000) -
High-Resolution Time-to-Digital Converter in Field Programmable Gate Array
por: Aloisio, A, et al.
Publicado: (2008)