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Asynchronous circuit design for VLSI signal processing

Detalles Bibliográficos
Autores principales: Malik, Sharad, Meng, Teresa H
Lenguaje:eng
Publicado: Kluwer 1994
Materias:
Acceso en línea:http://cds.cern.ch/record/352660
_version_ 1780892397298778112
author Malik, Sharad
Meng, Teresa H
author_facet Malik, Sharad
Meng, Teresa H
author_sort Malik, Sharad
collection CERN
id cern-352660
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1994
publisher Kluwer
record_format invenio
spelling cern-3526602021-04-22T03:25:47Zhttp://cds.cern.ch/record/352660engMalik, SharadMeng, Teresa HAsynchronous circuit design for VLSI signal processingEngineeringKluweroai:cds.cern.ch:3526601994
spellingShingle Engineering
Malik, Sharad
Meng, Teresa H
Asynchronous circuit design for VLSI signal processing
title Asynchronous circuit design for VLSI signal processing
title_full Asynchronous circuit design for VLSI signal processing
title_fullStr Asynchronous circuit design for VLSI signal processing
title_full_unstemmed Asynchronous circuit design for VLSI signal processing
title_short Asynchronous circuit design for VLSI signal processing
title_sort asynchronous circuit design for vlsi signal processing
topic Engineering
url http://cds.cern.ch/record/352660
work_keys_str_mv AT maliksharad asynchronouscircuitdesignforvlsisignalprocessing
AT mengteresah asynchronouscircuitdesignforvlsisignalprocessing