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Vlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor design
Autores principales: | , , , , |
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Lenguaje: | eng |
Publicado: |
Springer
1996
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/352662 |
_version_ | 1780892397529464832 |
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author | Golze, Ulrich Blinzer, Peter Cochlovius, Elmar Schäfers, Michael Wachsmann, Klaus Peter |
author_facet | Golze, Ulrich Blinzer, Peter Cochlovius, Elmar Schäfers, Michael Wachsmann, Klaus Peter |
author_sort | Golze, Ulrich |
collection | CERN |
id | cern-352662 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 1996 |
publisher | Springer |
record_format | invenio |
spelling | cern-3526622021-04-22T03:25:46Zhttp://cds.cern.ch/record/352662engGolze, UlrichBlinzer, PeterCochlovius, ElmarSchäfers, MichaelWachsmann, Klaus PeterVlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor designComputing and ComputersSpringeroai:cds.cern.ch:3526621996 |
spellingShingle | Computing and Computers Golze, Ulrich Blinzer, Peter Cochlovius, Elmar Schäfers, Michael Wachsmann, Klaus Peter Vlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor design |
title | Vlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor design |
title_full | Vlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor design |
title_fullStr | Vlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor design |
title_full_unstemmed | Vlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor design |
title_short | Vlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor design |
title_sort | vlsi chip design with the hardware description language verilog: an introduction based on a large risc processor design |
topic | Computing and Computers |
url | http://cds.cern.ch/record/352662 |
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