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Logical effort: designing fast CMOS circuits
Autores principales: | , , |
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Lenguaje: | eng |
Publicado: |
Kaufmann
1999
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/402613 |
_version_ | 1780894247366426624 |
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author | Sutherland, Ivan Edward Harris, David Sproull, Bob |
author_facet | Sutherland, Ivan Edward Harris, David Sproull, Bob |
author_sort | Sutherland, Ivan Edward |
collection | CERN |
id | cern-402613 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 1999 |
publisher | Kaufmann |
record_format | invenio |
spelling | cern-4026132021-04-22T03:15:34Zhttp://cds.cern.ch/record/402613engSutherland, Ivan EdwardHarris, DavidSproull, BobLogical effort: designing fast CMOS circuitsEngineeringKaufmannoai:cds.cern.ch:4026131999 |
spellingShingle | Engineering Sutherland, Ivan Edward Harris, David Sproull, Bob Logical effort: designing fast CMOS circuits |
title | Logical effort: designing fast CMOS circuits |
title_full | Logical effort: designing fast CMOS circuits |
title_fullStr | Logical effort: designing fast CMOS circuits |
title_full_unstemmed | Logical effort: designing fast CMOS circuits |
title_short | Logical effort: designing fast CMOS circuits |
title_sort | logical effort: designing fast cmos circuits |
topic | Engineering |
url | http://cds.cern.ch/record/402613 |
work_keys_str_mv | AT sutherlandivanedward logicaleffortdesigningfastcmoscircuits AT harrisdavid logicaleffortdesigningfastcmoscircuits AT sproullbob logicaleffortdesigningfastcmoscircuits |