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Multiple clock strategies in a HDL design methodology
| Autores principales: | , |
|---|---|
| Lenguaje: | eng |
| Publicado: |
1999
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/403607 |
| _version_ | 1780894275130621952 |
|---|---|
| author | López, T M Hernández, J M |
| author_facet | López, T M Hernández, J M |
| author_sort | López, T M |
| collection | CERN |
| id | cern-403607 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 1999 |
| record_format | invenio |
| spelling | cern-4036072019-09-30T06:29:59Zhttp://cds.cern.ch/record/403607engLópez, T MHernández, J MMultiple clock strategies in a HDL design methodologyComputing and ComputersCERN-IT-99-004oai:cds.cern.ch:4036071999 |
| spellingShingle | Computing and Computers López, T M Hernández, J M Multiple clock strategies in a HDL design methodology |
| title | Multiple clock strategies in a HDL design methodology |
| title_full | Multiple clock strategies in a HDL design methodology |
| title_fullStr | Multiple clock strategies in a HDL design methodology |
| title_full_unstemmed | Multiple clock strategies in a HDL design methodology |
| title_short | Multiple clock strategies in a HDL design methodology |
| title_sort | multiple clock strategies in a hdl design methodology |
| topic | Computing and Computers |
| url | http://cds.cern.ch/record/403607 |
| work_keys_str_mv | AT lopeztm multipleclockstrategiesinahdldesignmethodology AT hernandezjm multipleclockstrategiesinahdldesignmethodology |