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CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)

The tracking system of the CMS detector at the LHC employs Front End Driver (FED) cards to digitise, buffer and sparsify analogue data arriving via optical links from on detector pipeline chips. This paper describes a prototype version of the FED based upon the popular commercial PCI bus Mezzanine C...

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Autor principal: J.Coughlan
Publicado: 1998
Materias:
Acceso en línea:http://cds.cern.ch/record/41191
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author J.Coughlan
author_facet J.Coughlan
author_sort J.Coughlan
collection CERN
description The tracking system of the CMS detector at the LHC employs Front End Driver (FED) cards to digitise, buffer and sparsify analogue data arriving via optical links from on detector pipeline chips. This paper describes a prototype version of the FED based upon the popular commercial PCI bus Mezzanine Card (PMC) form factor. The FED-PMC consists of an 8 channel, 9 bit ADC, card, providing a 1 MByte data buffer and operating at the LHC design frequency of 40 MHz. The core of the card is a re-programmable FPGA which allows the functionality of the card to be conveniently modified. The card is supplied with a comprehensive library of C routines.The PMC form factor allows the card to be plugged onto a wide variety of processor carrier boards and even directly into PCI based PCs. The flexibility of the FPGA based design permits the card to be used in a variety of ADC based applications.
id cern-41191
institution Organización Europea para la Investigación Nuclear
publishDate 1998
record_format invenio
spelling cern-411912019-09-30T06:29:59Zhttp://cds.cern.ch/record/41191J.CoughlanCMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)TrackerThe tracking system of the CMS detector at the LHC employs Front End Driver (FED) cards to digitise, buffer and sparsify analogue data arriving via optical links from on detector pipeline chips. This paper describes a prototype version of the FED based upon the popular commercial PCI bus Mezzanine Card (PMC) form factor. The FED-PMC consists of an 8 channel, 9 bit ADC, card, providing a 1 MByte data buffer and operating at the LHC design frequency of 40 MHz. The core of the card is a re-programmable FPGA which allows the functionality of the card to be conveniently modified. The card is supplied with a comprehensive library of C routines.The PMC form factor allows the card to be plugged onto a wide variety of processor carrier boards and even directly into PCI based PCs. The flexibility of the FPGA based design permits the card to be used in a variety of ADC based applications.CMS-PHO-TRACKER-1998-002oai:cds.cern.ch:411911998-10-01
spellingShingle Tracker
J.Coughlan
CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)
title CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)
title_full CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)
title_fullStr CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)
title_full_unstemmed CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)
title_short CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)
title_sort cms tracker readout prototype front-end driver pci mezzanine card (mk1) (connector side)
topic Tracker
url http://cds.cern.ch/record/41191
work_keys_str_mv AT jcoughlan cmstrackerreadoutprototypefrontenddriverpcimezzaninecardmk1connectorside