The ALICE Time of Flight Readout System: AFRO

The ALICE Time of Flight Detector system comprises more than 100.000 channels and covers an area of more than 100 m<SUP>2</SUP>. The timing resolution should be better than 150 ps. This combination of requirements poses a major challenge to the readout system. All detector timing measurements are referenced to a unique start signal t0. This signal is generated at the time an event occurs. Timing measurements are performed using a multichannel TDC chip which requires a 40 MHz reference clock signal. The general concept of the readout system is based on a modular architecture. Detector cells are combined to modules of 1024 channels. Each of these modules can be read out and calibrated independently from each other. By distributing a reference signal, a timing relationship between the modules is established. This reference signal can either be the start signal t0 or the TDC-reference clock. The readout architecture is divided into three steps; the TDC controller, the module controller, and the time of flight controller. The TDC controller reads all hit data and stores it into internal memories. Upon arrival of a positive level1 trigger decision 5us after the corresponding event hit, data is transferred from the TDC controller to the module controller and stored. In case no positive level1 trigger decision has been issued, corresponding data is discarded in the TDC controller or alternatively can be transferred to the module controller for monitoring reasons. The module controller prepares the data transmission to the data acquisition. In case a positive level2 trigger decision is issued, the module controller ships the corresponding data to the time of flight controller. The maximum level2 trigger latency will not exceed 100 us.<P>The time of flight controller acts as a data concentrator and as interface to the ALICE data acquisition for the entire time of flight detector. A major challenge of the time of flight detector readout is its calibration. Due to change of temperature or even due to mechanical stress imposed to cables transmission delays will change. Although it is not expected that these changes of delays will occur on a short term basis, permanent monitoring must be foreseen. In order not to be dependent entirely on offline analysis to calibrate the readout system, an online electronic calibration and monitoring system is going to be implemented. Transmission of calibration pulses from the TDC electronics to the front-end electronics allows monitoring of delay changes online. A model of the readout system has been developed which copes with the requirements given by the experiment. The readout architecture has been adapted both to the environment given by the detector and to the requirements given by the ALICE trigger and data acquisition. <P>This optimization process was carried out using the hardware description language VHDL. It is planned to complete an FPGA based prototype of the TDC readout by the end of 1999. Furthermore, investigations concerning the distribution of the reference signal t0, the system clock, and the calibration signals are going to be performed.