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Deep submicron CMOS technologies for the LHC experiments
The harsh radiation environment at the Large Hadron Collider (LHC) requires radiation hard ASICs. This paper presents how a high tolerance for total ionizing dose can be obtained in commercial deep submicron technologies by using enclosed NMOS devices and guard rings. The method is explained, demons...
Autores principales: | , , , , , , , , , , , , , , , , |
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Lenguaje: | eng |
Publicado: |
1999
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1016/S0920-5632(99)00615-5 http://cds.cern.ch/record/428707 |