Dilogic-2: A Sparse Data Scan Readout Processor for the HMPID Detector of ALICE

The processing of analog information is always spoiled by additional DC level and noise given by the sensors or their additional readout electronics. The Dilogic-2 ASICcircuit has been developed in a 0.7um n-well CMOS technologyto process the data given by Analog to Digital Converters, in order to e...

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Detalles Bibliográficos
Autores principales: Witters, H, Santiard, Jean-Claude, Martinengo, P
Lenguaje:eng
Publicado: CERN 2000
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.5170/CERN-2000-010.179
http://cds.cern.ch/record/439170
Descripción
Sumario:The processing of analog information is always spoiled by additional DC level and noise given by the sensors or their additional readout electronics. The Dilogic-2 ASICcircuit has been developed in a 0.7um n-well CMOS technologyto process the data given by Analog to Digital Converters, in order to eliminate the empty channels, to subtract the base line (pedestal) and to locally store the true analog information.(Abstract only available, full text willfollow)

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