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Optimizing IA-64 performance
Examines key features of the Itanium processor architecture and microarchitecture. The Itanium, originally known as the IA-64, is a 64-bit processor designed by Hewlett-Packard and Intel. In addition to the obvious performance gains that 64-bit addressing brings, the Itanium also supports performanc...
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Lenguaje: | eng |
Publicado: |
2001
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/508326 |
Sumario: | Examines key features of the Itanium processor architecture and microarchitecture. The Itanium, originally known as the IA-64, is a 64-bit processor designed by Hewlett-Packard and Intel. In addition to the obvious performance gains that 64-bit addressing brings, the Itanium also supports performance-enhancing techniques such as predication, speculation, rotating registers, a wide parallel execution core, high clock speed, fast bus architecture, multiple execution units, and the like. Moreover, the Itanium is designed from the ground up around parallelism and uses a new kind of instruction set based on the Explicit Parallel Instruction Computing (EPIC) specification, which allows the processing of Windows-based and UNIX- based applications, among other features. Operating-system support for the IA-64 has been announced for 64-bit Windows, HP-UX, varieties of Linux, and AIX 51. The author shows how to achieve optimal code generation by a compiler or generate optimized sequences ofIA-64 assembly code to ensure top speed. (0 refs). |
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