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Multi-hit time-to-digital converter VLSI for high-energy physics experiments
A multi-hit time-to-digital converter VLSI has been developed using a CMOS 0.3 mu m gate-array technology. The chip is designed for use in a high-energy physics experiment ATLAS. Precise timing signals are generated from 16 taps of an asymmetric ring oscillator oscillating at 80 MHz and controlled b...
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Lenguaje: | eng |
Publicado: |
2001
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/516156 |
Sumario: | A multi-hit time-to-digital converter VLSI has been developed using a CMOS 0.3 mu m gate-array technology. The chip is designed for use in a high-energy physics experiment ATLAS. Precise timing signals are generated from 16 taps of an asymmetric ring oscillator oscillating at 80 MHz and controlled by a PLL circuit. A prototype chip has been developed, and a time resolution of 300 ps RMS was obtained. Many macro cells are developed to achieve such high resolution still using commercial gate-array technology. (4 refs). |
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