Radiation test and application of FPGAs in the ATLAS Level 1 Trigger

The front-end system of the Silicon Drift Detectors (SDDs) of the ALICE experiment is made of two ASICs. The first chip performs the preamplification, temporary analogue storage and analogue-to-digital conversion of the detector signals. The second chip is a digital buffer that allows for a signific...

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Detalles Bibliográficos
Autores principales: Bocci, V, Carletti, M, Chiodi, G, Gennari, E, Petrolo, E, Salamon, A, Vari, R, Veneziano, Stefano
Lenguaje:eng
Publicado: CERN 2001
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.5170/CERN-2001-005.137
http://cds.cern.ch/record/529388
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author Bocci, V
Carletti, M
Chiodi, G
Gennari, E
Petrolo, E
Salamon, A
Vari, R
Veneziano, Stefano
author_facet Bocci, V
Carletti, M
Chiodi, G
Gennari, E
Petrolo, E
Salamon, A
Vari, R
Veneziano, Stefano
author_sort Bocci, V
collection CERN
description The front-end system of the Silicon Drift Detectors (SDDs) of the ALICE experiment is made of two ASICs. The first chip performs the preamplification, temporary analogue storage and analogue-to-digital conversion of the detector signals. The second chip is a digital buffer that allows for a significant reduction of the connection from the front-end module to the outside world. In this paper, the results achieved on the first complete prototype of the front-end system for the SDDs of ALICE are presented.
id cern-529388
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2001
publisher CERN
record_format invenio
spelling cern-5293882019-09-30T06:29:59Zdoi:10.5170/CERN-2001-005.137http://cds.cern.ch/record/529388engBocci, VCarletti, MChiodi, GGennari, EPetrolo, ESalamon, AVari, RVeneziano, StefanoRadiation test and application of FPGAs in the ATLAS Level 1 TriggerDetectors and Experimental TechniquesThe front-end system of the Silicon Drift Detectors (SDDs) of the ALICE experiment is made of two ASICs. The first chip performs the preamplification, temporary analogue storage and analogue-to-digital conversion of the detector signals. The second chip is a digital buffer that allows for a significant reduction of the connection from the front-end module to the outside world. In this paper, the results achieved on the first complete prototype of the front-end system for the SDDs of ALICE are presented.CERNoai:cds.cern.ch:5293882001
spellingShingle Detectors and Experimental Techniques
Bocci, V
Carletti, M
Chiodi, G
Gennari, E
Petrolo, E
Salamon, A
Vari, R
Veneziano, Stefano
Radiation test and application of FPGAs in the ATLAS Level 1 Trigger
title Radiation test and application of FPGAs in the ATLAS Level 1 Trigger
title_full Radiation test and application of FPGAs in the ATLAS Level 1 Trigger
title_fullStr Radiation test and application of FPGAs in the ATLAS Level 1 Trigger
title_full_unstemmed Radiation test and application of FPGAs in the ATLAS Level 1 Trigger
title_short Radiation test and application of FPGAs in the ATLAS Level 1 Trigger
title_sort radiation test and application of fpgas in the atlas level 1 trigger
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.5170/CERN-2001-005.137
http://cds.cern.ch/record/529388
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AT petroloe radiationtestandapplicationoffpgasintheatlaslevel1trigger
AT salamona radiationtestandapplicationoffpgasintheatlaslevel1trigger
AT varir radiationtestandapplicationoffpgasintheatlaslevel1trigger
AT venezianostefano radiationtestandapplicationoffpgasintheatlaslevel1trigger

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