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A pipeline of associative memory boards for track finding
We present a pipeline of associative memory boards for track finding, which satisfies the requirements of level two triggers of the next LHC experiments. With respect to previous realizations, the pipelined architecture warrants full scalability of the memory bank, increased bandwidth (by one order...
| Autores principales: | , , , , , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2000
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/560361 |