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An MWPC readout chip for high rate environment
An ASIC has been fabricated in order to readout data from an MWPC that is installed in high rate environment. 16 channels and an ancillary control circuit are packed in a chip, and a channel consists of LVDS Receiver and 100-stage shift register array for delay. A hit data from the chamber is once i...
| Autores principales: | , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2000
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/560386 |