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Commodity multi-processor systems in the ATLAS level-2 trigger
Low cost SMP (symmetric multi-processor) systems provide substantial CPU and I/O capacity. These features together with the ease of system integration make them an attractive and cost effective solution for a number of real-time applications in event selection. In ATLAS we consider them as intellige...
Autores principales: | , , , , , , , , , , , , , |
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Lenguaje: | eng |
Publicado: |
2000
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/560388 |
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author | Abolins, M Blair, R Bock, R Bogaerts, J A C Dawson, J Ermoline, Y Hauser, R Kugel, A Lay, R Müller, M Noffz, K H Pope, B Schlereth, J L Werner, P |
author_facet | Abolins, M Blair, R Bock, R Bogaerts, J A C Dawson, J Ermoline, Y Hauser, R Kugel, A Lay, R Müller, M Noffz, K H Pope, B Schlereth, J L Werner, P |
author_sort | Abolins, M |
collection | CERN |
description | Low cost SMP (symmetric multi-processor) systems provide substantial CPU and I/O capacity. These features together with the ease of system integration make them an attractive and cost effective solution for a number of real-time applications in event selection. In ATLAS we consider them as intelligent input buffers (an "active" ROB complex), as event flow supervisors or as powerful processing nodes. Measurements of the performance of one off-the-shelf commercial 4- processor PC with two PCI buses, equipped with commercial FPGA based data source cards (microEnable) and running commercial software are presented and mapped on such applications together with a long-term programme of work. The SMP systems may be considered as an important building block in future data acquisition systems. (9 refs). |
id | cern-560388 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2000 |
record_format | invenio |
spelling | cern-5603882019-09-30T06:29:59Zhttp://cds.cern.ch/record/560388engAbolins, MBlair, RBock, RBogaerts, J A CDawson, JErmoline, YHauser, RKugel, ALay, RMüller, MNoffz, K HPope, BSchlereth, J LWerner, PCommodity multi-processor systems in the ATLAS level-2 triggerDetectors and Experimental TechniquesLow cost SMP (symmetric multi-processor) systems provide substantial CPU and I/O capacity. These features together with the ease of system integration make them an attractive and cost effective solution for a number of real-time applications in event selection. In ATLAS we consider them as intelligent input buffers (an "active" ROB complex), as event flow supervisors or as powerful processing nodes. Measurements of the performance of one off-the-shelf commercial 4- processor PC with two PCI buses, equipped with commercial FPGA based data source cards (microEnable) and running commercial software are presented and mapped on such applications together with a long-term programme of work. The SMP systems may be considered as an important building block in future data acquisition systems. (9 refs).oai:cds.cern.ch:5603882000 |
spellingShingle | Detectors and Experimental Techniques Abolins, M Blair, R Bock, R Bogaerts, J A C Dawson, J Ermoline, Y Hauser, R Kugel, A Lay, R Müller, M Noffz, K H Pope, B Schlereth, J L Werner, P Commodity multi-processor systems in the ATLAS level-2 trigger |
title | Commodity multi-processor systems in the ATLAS level-2 trigger |
title_full | Commodity multi-processor systems in the ATLAS level-2 trigger |
title_fullStr | Commodity multi-processor systems in the ATLAS level-2 trigger |
title_full_unstemmed | Commodity multi-processor systems in the ATLAS level-2 trigger |
title_short | Commodity multi-processor systems in the ATLAS level-2 trigger |
title_sort | commodity multi-processor systems in the atlas level-2 trigger |
topic | Detectors and Experimental Techniques |
url | http://cds.cern.ch/record/560388 |
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