Studying Radiation Tolerant ICs for LHC

%title\\ \\In the recent years, intensive work has been carried out on the development of custom ICs for the readout electronics for LHC experiments. As far as radiation hardness is concerned, attention has been focussed on high total dose applications, mainly for the tracker systems. The dose foreseen in this inner region is estimated to be higher than 1~Mrad/year. In the framework of R&D projects (RD-9 and RD-20) and in the ATLAS and CMS experiments, the study of different radiation hard processes has been pursued and good contacts with the manufacturers have been established. The results of these studies have been discussed during the Microelectronics User Group (MUG) rad-hard meetings, and now some HEP groups are working to develop radiation hard ICs for the LHC experiments on some of the available rad-hard processes.\\ \\In addition, a lot of the standard commercial electronic components and ASICs which are planned to be installed near the LHC machine and in the detectors will receive total doses in the range of 10~krad to 300~krad. This is the case for the outer detector regions of ATLAS, CMS and LHC-B, such as muons, outer regions of the calorimeters and trackers, and the whole ALICE detector. Emerging commercial VLSI deep submicron CMOS processes have a very thin gate oxide of 10~nm or less, and therefore submicron devices are expected to become intrinsically hardened against charge trapping effects in the thin oxides. Preliminary studies by several teams indicate promising results for radiation tolerant applications of submicron CMOS processes. This approach has several advantages coming from the use of mainstream technology, such as high volume production and stable processes, high yield, and high device density technology.\\ \\In the MUG meeting held at CERN in June 1996, the issue of radiation tolerant circuits manufactured on commercial CMOS deep submicron processes has been addressed. On this occasion, it has been suggested that the use of such processes, though promising, requires high care and often the application of special architectural and layout techniques. Failures could come not only from total dose effects, but also from Single Event Effects~(SEE), and particularly from latchup that can destroy ICs completely, or render them unusable if they are not protected by an anti-latchup system.\\ \\The use of Commercial Off The Shelf~(COTS) parts is getting more and more popular in the Space community, where the total dose tolerance required is around 20-50~krad over a ten year mission. Though the demand in total dose is lower than that of the outer detectors of the LHC experiments, a specific design methodology for custom chips, latch-up protection and proper qualification protocols for standard CMOS parts are common needs. The Space community has been working on components and technology qualification for more than 20~years, and a standard procedure which guarantees the reliability of the ICs in the space environment has been defined and is under continuous revision. The HEP community could profit from this experience.\\ \\\\ \\