Digital Signal Processing Applications and Implementation for Accelerators: Digital Notch Filter with Programmable Delay and Betatron Phase Adjustment for the PS, SPS and LHC Transverse Dampers

In the framework of the LHC project and the modifications of the SPS as its injector, I present the concept of global digital signal processing applied to a particle accelerator, using Field Programmable Gate Array (FPGA) technology. The approach of global digital synthesis implements in numerical form the architecture of a system, from the start up of a project and the very beginning of the signal flow. It takes into account both the known parameters and the future evolution, whenever possible.<br> Due to the increased performance requirements of today's projects, the CAE design methodology becomes more and more necessary to handle successfully the added complexity and speed of modern electronic circuits. Simulation is performed both for behavioural analysis, to ensure conformity to functional requirements, and for time signal analysis (speed requirements). The digital notch filter with programmable delay for the SPS Transverse Damper is now fully operational with fixed target and LHC-type beams circulating in the SPS and is a successful implementation of this concept. The transfer function is programmable and therefore the same equipment can be reprogrammed for use in future projects.