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Data concentrator for the LHCb outer tracker detector

In the article a design of data concentrator for the readout of outer tracker detector at LHCb is presented. The project is based on a single FPGA chip. Eight serial links are multiplexed into a single parallel one, total bandwidth is about 60 MB/s. Incoming data words are buffered, grouped into sub...

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Detalles Bibliográficos
Autor principal: Kapusta, P
Lenguaje:eng
Publicado: 2002
Materias:
Acceso en línea:http://cds.cern.ch/record/596692
Descripción
Sumario:In the article a design of data concentrator for the readout of outer tracker detector at LHCb is presented. The project is based on a single FPGA chip. Eight serial links are multiplexed into a single parallel one, total bandwidth is about 60 MB/s. Incoming data words are buffered, grouped into sub-events and sent out with special header, trailer and error block. Overflow, parity and data inconsistency errors are detected. Buffers are sufficient to make the dead time negligible. (4 refs).