FPGA Co-processor for the ALICE High Level Trigger

The High Level Trigger (HLT) of the ALICE experiment requires massive parallel computing. One of the main tasks of the HLT system is two-dimensional cluster finding on raw data of the Time Projection Chamber (TPC), which is the main data source of ALICE. To reduce the number of computing nodes neede...

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Detalles Bibliográficos
Autores principales: Grastveit, G., Helstrup, H., Lindenstruth, V., Loizides, C., Roehrich, D., Skaali, B., Steinbeck, T., Stock, R., Tilsner, H., Ullaland, K., Vestbo, A., Vik, T.
Lenguaje:eng
Publicado: 2003
Materias:
Other Fields of Physics
Acceso en línea:http://cds.cern.ch/record/619518
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author Grastveit, G.
Helstrup, H.
Lindenstruth, V.
Loizides, C.
Roehrich, D.
Skaali, B.
Steinbeck, T.
Stock, R.
Tilsner, H.
Ullaland, K.
Vestbo, A.
Vik, T.
author_facet Grastveit, G.
Helstrup, H.
Lindenstruth, V.
Loizides, C.
Roehrich, D.
Skaali, B.
Steinbeck, T.
Stock, R.
Tilsner, H.
Ullaland, K.
Vestbo, A.
Vik, T.
author_sort Grastveit, G.
collection CERN
description The High Level Trigger (HLT) of the ALICE experiment requires massive parallel computing. One of the main tasks of the HLT system is two-dimensional cluster finding on raw data of the Time Projection Chamber (TPC), which is the main data source of ALICE. To reduce the number of computing nodes needed in the HLT farm, FPGAs, which are an intrinsic part of the system, will be utilized for this task. VHDL code implementing the Fast Cluster Finder algorithm, has been written, a testbed for functional verification of the code has been developed, and the code has been synthesized
id cern-619518
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2003
record_format invenio
spelling cern-6195182023-03-14T20:00:06Zhttp://cds.cern.ch/record/619518engGrastveit, G.Helstrup, H.Lindenstruth, V.Loizides, C.Roehrich, D.Skaali, B.Steinbeck, T.Stock, R.Tilsner, H.Ullaland, K.Vestbo, A.Vik, T.FPGA Co-processor for the ALICE High Level TriggerOther Fields of PhysicsThe High Level Trigger (HLT) of the ALICE experiment requires massive parallel computing. One of the main tasks of the HLT system is two-dimensional cluster finding on raw data of the Time Projection Chamber (TPC), which is the main data source of ALICE. To reduce the number of computing nodes needed in the HLT farm, FPGAs, which are an intrinsic part of the system, will be utilized for this task. VHDL code implementing the Fast Cluster Finder algorithm, has been written, a testbed for functional verification of the code has been developed, and the code has been synthesizedThe High Level Trigger (HLT) of the ALICE experiment requires massive parallel computing. One of the main tasks of the HLT system is two-dimensional cluster finding on raw data of the Time Projection Chamber (TPC), which is the main data source of ALICE. To reduce the number of computing nodes needed in the HLT farm, FPGAs, which are an intrinsic part of the system, will be utilized for this task. VHDL code implementing the Fast Cluster Finder algorithm, has been written, a testbed for functional verification of the code has been developed, and the code has been synthesizedphysics/0306017CHEP-2003-THHT001oai:cds.cern.ch:6195182003-06-02
spellingShingle Other Fields of Physics
Grastveit, G.
Helstrup, H.
Lindenstruth, V.
Loizides, C.
Roehrich, D.
Skaali, B.
Steinbeck, T.
Stock, R.
Tilsner, H.
Ullaland, K.
Vestbo, A.
Vik, T.
FPGA Co-processor for the ALICE High Level Trigger
title FPGA Co-processor for the ALICE High Level Trigger
title_full FPGA Co-processor for the ALICE High Level Trigger
title_fullStr FPGA Co-processor for the ALICE High Level Trigger
title_full_unstemmed FPGA Co-processor for the ALICE High Level Trigger
title_short FPGA Co-processor for the ALICE High Level Trigger
title_sort fpga co-processor for the alice high level trigger
topic Other Fields of Physics
url http://cds.cern.ch/record/619518
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AT steinbeckt fpgacoprocessorforthealicehighleveltrigger
AT stockr fpgacoprocessorforthealicehighleveltrigger
AT tilsnerh fpgacoprocessorforthealicehighleveltrigger
AT ullalandk fpgacoprocessorforthealicehighleveltrigger
AT vestboa fpgacoprocessorforthealicehighleveltrigger
AT vikt fpgacoprocessorforthealicehighleveltrigger

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