Prospects of FPGAs for the ATLAS LVL2 Trigger

This note intends to give an overview over the possible evolution of FPGAs, new developments in the field of reconfigurable hardware, the development of hardware programming schemes, and, last but not least, the practical applications of reconfigurable computing in general and for the LVL2 trigger....

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Detalles Bibliográficos
Autores principales: Hinkelbein, C, Kugel, A, Levinson, L, Männer, R, Müller, M, Sessler, M, Simmler, H, Singpiel, H
Lenguaje:eng
Publicado: 1999
Materias:
Detectors and Experimental Techniques
Acceso en línea:http://cds.cern.ch/record/683972
Descripción
Sumario:This note intends to give an overview over the possible evolution of FPGAs, new developments in the field of reconfigurable hardware, the development of hardware programming schemes, and, last but not least, the practical applications of reconfigurable computing in general and for the LVL2 trigger. The main areas in the LVL2 trigger, where FPGAs could advantageously be used, are the ROB complex and an acceleration of time-critical pattern recognition algorithms.

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