LVL2 Full TRT Scan Feature Extraction Algorithm for B Physics Performed on the Hybrid FPGA/CPU Processor System ATLANTIS: Measurement Results

This paper updates the preliminary results presented in [4] for a Full Scan TRT algorithm executed on the FPGA processor system ATLANTIS. ATLANTIS is a combination of FPGA and CPU based computing platforms. Compact-PCI provides the basic communication mechanism. The host CPU is a standard Intel Pentium (II) based PC in cPCI format.The FPGA computing boards reside on the hosts' cPCI bus and operate as co-processors to the host CPU. Viewed from the Level-2 farm ATLANTIS appears as a normal processing node with accelerated execution of specific algorithms. The TRT Scan algorithm described here consists of four steps. The two most demanding steps have been implemented on the FPGA co-processor. The measurement results show a speed-up factor of 9 for these two steps. The resulting TRT Scan rate for the accelerated system would be 190Hz compared to 30Hz on a plain Pentium-II/300 processor. The improved performance allows a significant reduction of the overall size of the Level-2 farm.