Optimization of Repetition Parameters For ABCD3T Chip Analogue Tests

For the purpose of reducing the testing time of the ABCD3T chip wafers for the ATLAS SCT, we need to optimize the values of the repetition parameters and the sequence of tests involved in both analogue and digital measurements of the chip. In this note we describe the study for the optimization of the repetition parameters for the analogue measurements. To measure the parameters of gain, offset, noise, and trim slope of the ABCD3T chip, we use the method of threshold scanning. Through statistical analysis and error propagation, we study the relationships between precision in noise, gain, offset, and trim slope; and the parameters of repetition. These parameters are number of voltage steps in each scan, N; number of triggers per voltage point, Nevts; and number of scan points, n. The noise precision provides a minimum condition for the product N(Nevts - 1). The constraints on scan points given by offset and trim slope precisions are also given.