SCI implementation study for LHCb data acquisition

This paper proposes the use of SCI 1 as a scalable standard to implement the eventbuilder network between the Readout-Units and the Subfarm Controllers of LHCb. SCI [Ref 1] allows for a memory bus-like interconnection between the data sources and the CPU farm, this implies that sources can directly write data to event-buffers in the farm. This data-driven eventbuilding is enhanced by DMA engines as part of the SCI adapters at the source buffers. In general, data may be either written from the sources (event driven DMA for the full readout) or pulled from the destination (demand-driven DMA for the phased readout). A mixture of both readout architectures is possible, a second level push and a third level pull scheme could simultaneously coexist across the same physical network. Sources and destinations are interconnected via very high bandwidth SCI rings ( 4-8 Gbit/s). By using SCI switches, bandwidth scaling up to any required throughput is possible. The functionalities of a Readout Unit (RU) and a Subfarm Controller ( SFC) for an SCI implementation are described and the corresponding eventbuilding procedures are outlined. For an SCI implementation, all event-building functionalities of an SFC are contained in commercial SCI adapters. It is shown that for the full readout, an 8 Gbyte/s LHCb system can be implemented with 16 SCI rings on each side of a 16\Theta 16 switch, interconnecting 50 RUs and 96 SFCs.1