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The Hardware Muon Trigger Track Finder Processor in CMS - Architecture and Algorithm
The paper discusses the architecture and functionality of the muon trigger track finder processor. The system segmentation and algorithm are described in detail. The system and algorithm has been optimized using the hardware description language VHDL. The processor is based on data from the drift tu...
| Autores principales: | , |
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| Lenguaje: | eng |
| Publicado: |
1997
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/687261 |