A synchronous architecture for the L0 muon trigger

In this note we describe a new implementation for the L0 muon trigger. It is based on a fully synchronous and pipeline architecture. The 25920 logical pads and strips data, produced by the muon detector, are sent at once to the muon trigger. The data transfer is performed at a frequency of 40 MHz an...

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Detalles Bibliográficos
Autores principales: Aslanides, Elie, Cachemiche, J P, Duval, P Y, Le Gac, R, Leroy, O, Liotard, P L, Menouni, M, Potheau, R, Tsaregorodtsev, A Yu
Lenguaje:eng
Publicado: 2001
Materias:
Detectors and Experimental Techniques
Acceso en línea:http://cds.cern.ch/record/691573

Internet

http://cds.cern.ch/record/691573

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