DAQ architecture and read-out protocole

The proposed LHCb readout architecture is overviewed, followed by discussion and comparison of two candidate readout protocols, namely the 'Full Readout' and'Phased Readout' protocols.The philosophy of the Full Readout protocol is to send all of the event data to a processor before commencing the high level trigger algorithms.This results in simplicity in the protocol at the cost of the bandwidth requirement for the readout network. This is our preferred approach if the network costs are not prohibitive. Using the Phased Readout protocol the event data is sent in portions according to the demands of the trigger algorithms. This results in a more complex protocol, but in a reduction on the readout network bandwidth requirement.The effect of transmission errors on the behaviour of the system, and the implementation of system partitioning, are also discussed.1