LHCb data flow requirements

This document summarises the basic requirements for the buffering, processing, monitoring and control of the data flowing from the detector front ends through all stages of the trigger. It covers the requirements in the following areas: The buffering and bandwidth required in subdetector frontend electronics to meet the demands of the Level0 and Level1 triggers. The preprocessing and multiplexing of detector data to provide digital, zerosuppressed data to the data acquisition system(DAQ). The bandwidth and buffering required for reading zero suppressed subdetector data into DAQ. Event building with error detection and recovery. The execution of the Level2 and Level3 trigger algorithms. The calibration, monitoring and storage of event data. Parallel and asynchronous running of different subdetector configurations using separate trigger sources. The working point of the data acquisition system will be a 40 kHz Level1 trigger rate and an average event size of , 100 kByte, including an allowance for electronic noise, this giving an event building requirement of , 4 GB/s. The processing requirement for the Level2 and Level3 triggers corresponds to , 1400 1000 Mips processors. The principle criteria for the design and implementation of the system, which must develope with running conditions evolving over a long period of time, are also summarised.1