Timing and fast control

Abstract -------- In this paper we discuss the current understanding of the design of the LHCb Timing and Fast Control (TFC) system. In view of the fact that there exists some infrastructure for a TFC in the form of the RD-12 TTC system we focus on the applicability of this system to the LHCb TFC, subject to the special LHCb requirements imposed by the LHCb two-level trigger architecture. We conclude that the RD-12 system can be used for our application, but that we have to build a few modules to support our high Level-0 accept rate (Readout Supervisor) and to support the requirement of partitioning (Switch). We expect no major problems in implementing both modules.