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LHCb VELO off detector electronics preprocessor and interface to the level 1 trigger
We present the implementation of the level 1 \velo trigger preprocessor and interface. We describe several possible algorithms for the common mode suppression and we present the performance of the devices inferred from simulation and testbeam data. We also present some preliminary considerations abo...
| Autores principales: | , , |
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| Lenguaje: | eng |
| Publicado: |
2001
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/691717 |
| Sumario: | We present the implementation of the level 1 \velo trigger preprocessor and interface. We describe several possible algorithms for the common mode suppression and we present the performance of the devices inferred from simulation and testbeam data. We also present some preliminary considerations about the interface to DAQ. |
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