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Use of an FPGA to identify electromagnetic clusters and isolated hadrons in the ATLAS level-1 calorimeter trigger

At the full LHC design luminosity of 10^34 cm^-2 s^-1 there will be approximately 10^9 proton-proton interactions per second. The ATLAS level-1 trigger is required to have an acceptance factor of order 10^-3. The calorimeter trigger covers the region eta < 5.0 and phi from 0 to 2 pi. The distribu...

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Detalles Bibliográficos
Autores principales: Garvey, J, Achenbach, R, Apostologlou, A, Barnett, B M, Bauss, B, Brawn, I P, Bohm, C, Dahlhoff, A, Davis, A O, Edwards, J, Eisenhandler, E F, Gee, C N P, Gillman, A R, Hanke, P, Hatley, R, Hellman, S, Hillier, S J, Hinderer, W, Jakobs, K, Kaiser, D, Kluge, E E, Landon, M P J, Mahboubi, K, Mahout, G, Meier, K, Mills, D, Moyse, E, Nix, O, Penno, K, Perera, V J O, Schmitt, K, Schäfer, U, Silverstein, S, Staley, R J, Thomas, J, Trefzger, T M, Watkins, Peter M, Watson, A
Lenguaje:eng
Publicado: 2003
Materias:
Acceso en línea:https://dx.doi.org/10.1016/S0168-9002(03)02015-1
http://cds.cern.ch/record/725122
Descripción
Sumario:At the full LHC design luminosity of 10^34 cm^-2 s^-1 there will be approximately 10^9 proton-proton interactions per second. The ATLAS level-1 trigger is required to have an acceptance factor of order 10^-3. The calorimeter trigger covers the region eta < 5.0 and phi from 0 to 2 pi. The distribution of transverse energy over the trigger phase space is analysed to identify candidates for electrons/photons, isolated hadrons, QCD jets and non-interacting particles. The Cluster Processor of the level-1 calorimeter trigger is designed to identify transverse energy clusters associated with the &#64257;rst two of these. The algorithms, based on the trigger tower energies which have been designed to identify such clusters, are described here. The algorithms are evaluated using an FPGA. The reasons for the choice of the actual FPGA being used are given. The performance of the FPGA has been fully simulated, and the expected latency has been shown to be within the limits of the time allocated to the cluster trigger. These results, together with the results of measurements made with real data into a fully con&#64257;gured FPGA, are presented and discussed.