A simulation of the FASTBUS protocols

FASTBUS is a standard bus system being developed for high speed data acquisition and processing in the next generation of large scale physics experiments. Prototypes are being built according to a draft specification. The FASTBUS protocols have been simulated using a powerful software tool which is a computer description language. This Instruction Set Processor Specification language, ISPS, has been used in the design and development of several microprocessor systems. Its applications are diverse, including automated design and the generation of machine relative software, as well as simulation. The results of the FASTBUS simulation are presented, with an overview of the ISPS hardware description language. An additional facility is discussed, which supplements the simulation by providing a visual presentation of the FASTBUS signals, that is, a timing-graph generator.