Design of hardware processors for use in high-energy physics (pattern recognition)

Investigates the possibility of performing pattern recognition tasks by special purpose processors, which are entirely hardwired and designed for high speed execution of a specific task. The aim is two- fold: i) to be able to apply reasonable selection criteria on events using the topology results f...

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Detalles Bibliográficos
Autores principales: Fucci, A, Letheren, M F, Sumner, F H, Verkerk, C, Vree, W G
Lenguaje:eng
Publicado: 1974
Materias:
Computing and Computers
Acceso en línea:http://cds.cern.ch/record/880039
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author Fucci, A
Letheren, M F
Sumner, F H
Verkerk, C
Vree, W G
author_facet Fucci, A
Letheren, M F
Sumner, F H
Verkerk, C
Vree, W G
author_sort Fucci, A
collection CERN
description Investigates the possibility of performing pattern recognition tasks by special purpose processors, which are entirely hardwired and designed for high speed execution of a specific task. The aim is two- fold: i) to be able to apply reasonable selection criteria on events using the topology results from the processors. It is expected that this can reduce the number of events retained for further analysis by a factor of 10-100 or even more. ii) to reduce the computer time for total analysis of selected events by performing the time-consuming pattern recognition elsewhere. (4 refs).
id cern-880039
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1974
record_format invenio
spelling cern-8800392019-09-30T06:29:59Zhttp://cds.cern.ch/record/880039engFucci, ALetheren, M FSumner, F HVerkerk, CVree, W GDesign of hardware processors for use in high-energy physics (pattern recognition)Computing and ComputersInvestigates the possibility of performing pattern recognition tasks by special purpose processors, which are entirely hardwired and designed for high speed execution of a specific task. The aim is two- fold: i) to be able to apply reasonable selection criteria on events using the topology results from the processors. It is expected that this can reduce the number of events retained for further analysis by a factor of 10-100 or even more. ii) to reduce the computer time for total analysis of selected events by performing the time-consuming pattern recognition elsewhere. (4 refs).oai:cds.cern.ch:8800391974
spellingShingle Computing and Computers
Fucci, A
Letheren, M F
Sumner, F H
Verkerk, C
Vree, W G
Design of hardware processors for use in high-energy physics (pattern recognition)
title Design of hardware processors for use in high-energy physics (pattern recognition)
title_full Design of hardware processors for use in high-energy physics (pattern recognition)
title_fullStr Design of hardware processors for use in high-energy physics (pattern recognition)
title_full_unstemmed Design of hardware processors for use in high-energy physics (pattern recognition)
title_short Design of hardware processors for use in high-energy physics (pattern recognition)
title_sort design of hardware processors for use in high-energy physics (pattern recognition)
topic Computing and Computers
url http://cds.cern.ch/record/880039
work_keys_str_mv AT fuccia designofhardwareprocessorsforuseinhighenergyphysicspatternrecognition
AT letherenmf designofhardwareprocessorsforuseinhighenergyphysicspatternrecognition
AT sumnerfh designofhardwareprocessorsforuseinhighenergyphysicspatternrecognition
AT verkerkc designofhardwareprocessorsforuseinhighenergyphysicspatternrecognition
AT vreewg designofhardwareprocessorsforuseinhighenergyphysicspatternrecognition

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