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1 MHz Readout
We present the design and possible implementation of a single-stage readout of the LHCb detector. This means the readout of the full detector at Level 0 accept rate of 1 MHz. Conclusion is that technically the proposed scheme can be implemented.
| Autores principales: | , , , , |
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| Lenguaje: | eng |
| Publicado: |
2005
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/882248 |