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Printed Circuit Board Signal Integrity Analysis at CERN: POSTER 2/2: Workshop
Printed circuit board (PCB) design layout for digital circuits has become a critical issue due to increasing clock frequencies and faster signal switching times. The Cadence SPECCTRAQuest package allows the detailed signal integrity (SI) analysis of designs from the schematic-entry phase to the boar...
Autores principales: | , |
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Lenguaje: | eng |
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2001
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/930874 |
_version_ | 1780909524175028224 |
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author | Sainson, Jean-Michel Evans, John |
author_facet | Sainson, Jean-Michel Evans, John |
author_sort | Sainson, Jean-Michel |
collection | CERN |
description | Printed circuit board (PCB) design layout for digital circuits has become a critical issue due to increasing clock frequencies and faster signal switching times. The Cadence SPECCTRAQuest package allows the detailed signal integrity (SI) analysis of designs from the schematic-entry phase to the board level. It is fully integrated into the Cadence PCB design flow and can be used to reduce prototype iterations and improve production robustness. Examples are given on how the tool can help engineers to make design choices and how to optimise board layout for electrical performance. Case studies of work done for LHC detectors are presented. |
id | cern-930874 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2001 |
record_format | invenio |
spelling | cern-9308742022-10-04T12:41:19Zhttp://cds.cern.ch/record/930874engSainson, Jean-MichelEvans, JohnPrinted Circuit Board Signal Integrity Analysis at CERN: POSTER 2/2: WorkshopOther Fields of EngineeringPrinted circuit board (PCB) design layout for digital circuits has become a critical issue due to increasing clock frequencies and faster signal switching times. The Cadence SPECCTRAQuest package allows the detailed signal integrity (SI) analysis of designs from the schematic-entry phase to the board level. It is fully integrated into the Cadence PCB design flow and can be used to reduce prototype iterations and improve production robustness. Examples are given on how the tool can help engineers to make design choices and how to optimise board layout for electrical performance. Case studies of work done for LHC detectors are presented.presentation-2006-031oai:cds.cern.ch:9308742001-09-10 |
spellingShingle | Other Fields of Engineering Sainson, Jean-Michel Evans, John Printed Circuit Board Signal Integrity Analysis at CERN: POSTER 2/2: Workshop |
title | Printed Circuit Board Signal Integrity Analysis at CERN: POSTER 2/2: Workshop |
title_full | Printed Circuit Board Signal Integrity Analysis at CERN: POSTER 2/2: Workshop |
title_fullStr | Printed Circuit Board Signal Integrity Analysis at CERN: POSTER 2/2: Workshop |
title_full_unstemmed | Printed Circuit Board Signal Integrity Analysis at CERN: POSTER 2/2: Workshop |
title_short | Printed Circuit Board Signal Integrity Analysis at CERN: POSTER 2/2: Workshop |
title_sort | printed circuit board signal integrity analysis at cern: poster 2/2: workshop |
topic | Other Fields of Engineering |
url | http://cds.cern.ch/record/930874 |
work_keys_str_mv | AT sainsonjeanmichel printedcircuitboardsignalintegrityanalysisatcernposter22workshop AT evansjohn printedcircuitboardsignalintegrityanalysisatcernposter22workshop |