Upgrade of the ALICE muon trigger electronics

The ALICE muon trigger is a large scale detector based on single gap bakelite RPCs. An upgrade of the electronics is needed in order to withstand the increase of luminosity after the LHC Long Shutdown-2 in 2018-2019. The detector will be read out at the minimum bias rate of 100 kHz in Pb–Pb collisions (including a safety factor of 2), two orders of magnitude above the present design. For the most exposed RPCs and in the present conditions of operation, the total integrated charge could be as high as 100 mC/cm(2) with rates up to 100 Hz/cm(2), which is above the present limit for safe operation. In order to overcome these limitations, upgrade projects of the Front-End (FE) and Readout Electronics are scheduled. The readout upgrade at high rate with low dead time requires changing most of the present electronics. It involves a new design for the 234 Local cards receiving the LVDS signals from the FE electronics and the 16 Regional concentrator cards. The readout chain is completed by a single Common Readout Unit developed for most ALICE sub-detectors. The new architecture of the muon trigger readout will be briefly presented. The present FE electronics, designed for the streamer mode, must be replaced to prevent ageing of the RPCs in the future operating conditions. The new FE called FEERIC (for Front-End Electronics Rapid Integrated Circuit) will have to perform amplification of the analog input signals. This will allow for RPC operation in a low-gain avalanche mode, with a much smaller charge deposit (factor 3-5) in the detector as compared to the present conditions. The purpose is to discriminate RPC signals with a charge threshold around 100 fC, in both polarities, and with a time jitter below 1 ns. We will describe the FE card and FEERIC ASIC features and first prototype performance, report on test results obtained on a cosmic test bench and discuss ongoing developments.