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A 20 mW, 4.8 Gbit/sec, SEU robust serializer in 65nm for read-out of data from LHC experiments
The availability of a sub 1-W SerDes for future LHC read-out systems is of paramount importance for building new low-mass inner detectors for HL-LHC. This work reports on the design of two alternative architectures for the serializer block within a high speed transmitter with the objective of achiev...
| Autores principales: | , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2014
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/9/01/C01004 http://cds.cern.ch/record/2025859 |